Advanced Nanoelectronic Device Design with Atomistic Simulations

Gerhard Klimeck, Purdue University

Usage Details

Jun Huang, James Fonseca, Gerhard Klimeck, Rajib Rahman, Ryan Mokos, Tillmann Kubis, Mykhailo Povolotskyi, Hesameddin Ilatikhameneh, Daniel Mejia, Bozidar Novakovic, Daniel Lemus, Evan Wilson, Archana Tankasala, Pengyu Long, Junzhe Geng, Yu Wang, Yuling Hsueh, Daniel Valencia, Fan Chen, James Charles, Harshad Sahasrabudhe, Tarek Ameen, Prasad Sarangapani, Yuanchen Chu, Samik Mukherjee, Kuang-Chung Wang, Chin-Yi Chen, Xinchen Guo, Frederico Marcolino Quintao Severgnini, KAVYA PRUDHVI

Modern CPUs are composed of billions of nanotransistors. To make these nanotransistors usable, it is essential that their performance characteristics vary minimally. However, ensuring that billions of transistors have little variation in their critical device characteristics is a huge challenge. At the scale of modern nanotransistors, even atomistic variations of the structure geometry can have a severe influence on overall device performance. This project will use the Blue Waters leadership computing system to derive new models to enable efficient reliability predictions of modern nanodevices at crucial milestones in their design. This will enable scientific and engineering based exploration of the end-of-the-roadmap device options, allowing our nation to remain the leader in semiconductor technologies. The project will use NEMO5, a software co-developed with the semiconductor industry, to propose concrete, next generation nanotransistors. Furthermore, many students will be involved in the project, contributing to the education of our nation's future generation workforce.

The state-of-the art nanodevices have characteristic lengths in the order of tens or one hundred of atoms. In these dimensions, unavoidable geometry fluctuations, even if they are of the order of one or a few atoms, can significantly impact performance. Thus, the design of modern devices has to consider the sensitivity of the nanostructure to fluctuations, as well as other important parameters that are known from earlier device generations. Phonons, i.e. vibrations of atoms, around their lattice sites have a severe impact on the device performance at this scale as well. Since only a few atoms are involved in the device transport, the interaction of electrons with phonons is based on a full quantum transport method that covers small-size coherent effects such as tunneling and confinement as well as incoherent scattering on device imperfections. Although quantum transport methods that handle this are well known, their solution is notoriously numerically expensive. This project has two focal points: 1) uncertainty prediction of next-generation transistor performance due to state-of-the-art physics models including scattering and 2) accurate compact model development of semiconductor-metal interconnect resistance.